Design for Test
Soctronics offers a suite of DFT solutions from flow & methodology development to a complete turnkey solution.
Deep sub-micron advanced technology nodes have increased the premium placed on test solutions. SoCtronics has experience helping build test solutions and productization of high performance CPU & GPU class SOCs to cost sensitive mobile SOCs.
Solutions executed for various SOCs include Memory BIST including repair, Logic BIST, Boundary Scan Insertion (IEEE 1149.1 & 1149.6), Test Controllers, Scan insertion, Scan Compression, Automatic Test Pattern Generation and fault simulation.
SoCtronics provides customers a complete FPGA prototyping solution set. FPGA prototyping helps in first pass silicon success and faster time to market.
Our experts work with the FPGA vendors of the customer’s choice – Xilinx, Altera etc., to provide design partitioning, RTL design optimizations for FPGA, RTL design porting to FPGA, synthesizing and mapping the design onto FPGA. SoCtronics can also help in leveraging standalone PHYs or FPGA built-in SERDES for verifying the peripheral logic controllers. SoCtronics can help customer to port verification environment for FPGA verification and also perform netlist simulations if required.
SoCtronics verification engineers have expertise in planning and building complex verification environments tailored for specific customer requirements. SoCtronics offers IP and SOC verification environment solutions utilizing industry standard tools, languages and methodologies from leading EDA vendors like CADENCE, SYNOPSYS, MENTOR.
SoCtronics has proven and hands-on expertise in executing complex IP & SOC verification projects using System Verilog, traditional verilog, C/C++, System C, Specman E languages and OVM/SVM methodologies. SoCtronics can build pure random verification environments, functional coverage driven models and directed test environments to enable first pass silicon success. SoCtronics engineers have deep functional expertise in peripheral protocols like USB, PCIe, SATA, Ethernet, SD, NAND, HDMI and bus protocols like AXI, AHB, BVCI and OCP.
SoCtronics can help customers in gathering verification requirements based on the IP, SOC or product specification and help in planning and executing the verification tasks.
SoCtronics’s engineers have hands on experience with all major EDA tool suites from Cadence, Synopsys, Magma, Mentor Graphics and related advanced technology options.
In house experts will help derive an execution model with the right technology node mapping based on product requirements, be it an ultra-mobile low power ASIC or a high performance CPU or GPU.
SoCtronics offers in house add-on flows like AdvancedChipBuilderTool™, SmartPower™ and RapidCharacterizationEngine™ to deliver differentiation that few can match.
SoCtronics offers both pre-silicon and post-silicon validation services. SoCtronics engineers have expertise in both FPGA based and Emulator (Cadence Palladium) based pre-silicon validation methodologies. In house experts offer services for partitioning design across multiple FPGA’s, design of HW platforms with target interfaces, design validation and debug of the DUT. SoCtronics can help in conceptualizing, writing and executing on end to end system test cases to augment IP/SOC verification.
SoCtronics can help the customer in planning the SoC bringup, designing the post-silicon boards, planning and executing on the post-silicon validation plans and silicon characterization. SoCtronics provides full-fledged FPGA and Post-silicon validation board design services including any auxiliary boards for interface testing, test planning services and can carry out compliance and compatibility testing.