Validation & Characterization Engineer

Job Title: Validation & Characterization Engineer

Job Qualification: M.Tech ‘or’ B.Tech (ECE)

Job Experience: 3 to 4 Years of relevant experience

Job Location: Hyderabad

Performs Design Evaluation and PVT Characterization for Analog IPs through Test Chips on Lab Bench.
Derives Test Plans to validate the DUT for functional and electrical performance across Manufacturing Process, Voltage, and Temperature corners.
Correlates the results with Data Sheet / Spec / Simulation Data / Wafer or ATE Test results to conclude the observations & generates reports.

  • Prior experience in executing electrical compliance tests of any of the high speed protocols (Eg. USB, PCIe, MPI DPHY etc.,)
  • Prior Validation, Characterization experience of SerDes, DDR3/DDR4, MIPI DPHY through Lab Bench and exposure in using Lab Equipment’s like J-BERT, DDR3 / DDR4 Protocol Analyzers etc.,
  • Ability to develop & write test scripts to control test equipment, DUT to automate the test coverage and to process the characterization data of different PVT electrical parameters.
  • Awareness of analog, mixed signal System Design & ability to refer to schematics / board / BOM files.
  • Awareness of high speed signal integrity (SI) requirements and its impact on Validation / Char results.

Desired Skills and Experience:

  • Good understanding of analog and digital circuit fundamentals.
  • Good written, verbal communication & data analysis skills
  • Proactive, Collaborative Skills to meet objectives by closing on cross Team dependencies.
  • Exposure to PVT characterization of any of the Analog IPs like GPIO, ADC / DAC, PLL, Clock Generator, Linear Power ‘or’ buck regulator, USB2.0 etc.,
  • Decent proficiency of scripting language like Python & Knowledge of C.
  • Hands-on skills in using Oscilloscopes, Logic Analyzer, Bench Top Meters, Thermal Equipment, Spectrum Analyzer & awareness of Probing / inter connect methods.
  • Must enjoy working with test equipment and DUT (Device Under Test) boards in a lab environment for iterative PVT activities and to debug complex System level problems.
  • Ability to Generate Test Reports with correlation, observations, spotting problems and successes.

To apply please send resumes to Email: