Power Design Lead

Job Title: Power Design Lead

Job Qualification: B. Tech. / M. Tech.

Job Experience: 5-8 years of experience in Powergrid design and IR/EM analysis

Job Location: Hyderabad, Bengaluru

Hands on experience with leading Power Grid Design and IR Drop Analysis(Die and Package) activities at fullchip level in multimillion gate SoC designs in cutting edge process technologies (40nm, 28nm, 16nm, 10nm)

  • Develop efficient IR Drop prevention strategies to achieve better Quality of Results, define measures for improvements in Physical Implementation
  • Work closely with Timing methodology/signoff team for Static/Dynamic IR Drop improvement measures
  • Responsible for debugging design power issues along with current tool and flow issues working closely with EDA vendors and drive them for new features
  • Work closely with PD team to define methodology to address IR drop and EM issues during PnR
  • Work closely with CAD teams and involve in methodology development and improvement
  • Own SoC PG grid design and IR/EM analysis activities while managing a team of 4-5 engineers

Desired Skills and Experience:

  • The candidate should be able to work with and lead a team of engineers working on PG closure on SOC designs
  • Should have handled PG design and analysis work for atleast 2-3 SoC designs on lower technology nodes
  • Working (hands on) knowledge on IR drop analysis, Power Analysis, using Redhawk, Primerail, Voltus, PTPX
  • Good understanding of design power consumption, estimation and low power design
  • Good understanding of IR/EM analysis, ESD analysis and leakage/dynamic power analysis with/without vectors
  • Deep knowledge of Apache, Synopsys tools and flow is a must
  • PG design on LP designs with multiple power domains is a plus
  • Knowledge in TCL, Perl scripting is a plus

To apply please send resumes to Email: hr@soctronics.com